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EMC pre-compliance risk analysis for KiCad PCB designs — 18 check categories, 44 rule IDs covering ground planes, decoupling, I/O filtering, switching harmonics, clock routing, differential pair skew, board edge radiation, PDN impedance, return paths, crosstalk, ESD protection, shielding, and magnetic leakage from switching inductors. Produces severity-ranked risk report with pre-compliance test plan. Supports FCC Part 15, CISPR 32, CISPR 25 (automotive), MIL-STD-461G. SPICE-enhanced when availa
Passed 17 of 20 test cases with the skill, and 3 of 20 without it.
and 13 more in the full report
16 fixed3 passed either way3 still failing0 broke
Tokens, turns and time describe resource use, not a dollar price.
One of 16 test cases the skill fixed. Same model, same prompt, with and without the skill.
Our industrial motor controller is deployed exclusively in US commercial and factory environments. Which regulatory standard option should be specified when running the EMC analysis script to target this commercial environment rather than residential standards?
| Checked | Without skill | With skill |
|---|---|---|
| Recommends specifying --standard fcc-class-a | Missed | Passed |
The instructions your model reads when the skill loads.
Automated EMC risk analysis for KiCad PCB designs. Identifies the most common causes of EMC test failures using geometric rule checks, analytical emission formulas, and optional SPICE simulation.
This is a risk analyzer, not a compliance predictor. It catches ~70% of common EMC design mistakes before fabrication. It cannot guarantee FCC/CISPR compliance — only a calibrated measurement in an accredited lab can do that. But it can reduce the first-spin failure rate from ~50% toward ~20-30%, potentially saving $5K-$50K per avoided board respin.
| Skill | Purpose |
|---|---|
kicad | Schematic/PCB analysis — produces the analyzer JSON this skill consumes |
kicad (thermal) | Thermal hotspot analysis — MLCC derating and ferrite/inductor overheating findings can amplify EMC decoupling and filter issues (an over-stressed MLCC degrades; a hot ferrite drifts impedance). Worth cross-checking when EMC flags DC-001/DC-002 or EF-001/EF-002. |
spice | SPICE simulation — provides simulator backend for SPICE-enhanced PDN/filter checks |
Handoff guidance: Run the kicad skill's analyze_schematic.py and analyze_pcb.py first — this skill consumes their JSON output. Use --full on the PCB analyzer for best results (enables per-track coordinates for ground plane crossing, edge proximity, and return path checks). During a design review, run EMC analysis after the schematic/PCB analyzers, SPICE simulation, and thermal analysis, then incorporate EMC findings into the report.
analyze_schematic.py --outputanalyze_pcb.py --full --output (recommended with --full)python3 <kicad-skill-path>/scripts/analyze_schematic.py design.kicad_sch --analysis-dir analysis/
python3 <kicad-skill-path>/scripts/analyze_pcb.py design.kicad_pcb --full --analysis-dir analysis/
Pass --analysis-dir analysis/ — the script auto-resolves schematic.json
and pcb.json from the manifest's current run, and writes emc.json into
the same folder so the manifest tracks it.
# Recommended: auto-resolve inputs from the current run
test cases passed, vs 3 / 20 without
More skills from the same source and nearby in the registry, with their headline benchmark lift.