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Get Started Free →nvidia/jetson-customize-usb
Enable/disable Jetson USB2/USB3 SS ports via kernel-DT overlay.
Passed 14 of 19 test cases with the skill, and 8 of 19 without it.
and 5 more in the full report
7 fixed9 passed either way6 still failing0 broke
Tokens, turns and time describe resource use, not a dollar price.
One of 7 test cases the skill fixed. Same model, same prompt, with and without the skill.
Which device tree property inside a USB3 port node identifies its linked USB2 companion port phandle?
| Checked | Without skill | With skill |
|---|---|---|
| Names the nvidia,usb2-companion property. | Missed | Passed |
The instructions your model reads when the skill loads.
Enable, disable, or change the role of USB2 / USB3 SS ports on a
Jetson Thor (Tegra264) or Orin (Tegra234) custom carrier. Captures
per-port wiring (role, max speed, VBUS-EN / OC GPIOs, CC1/CC2 GPIOs
for Type-C, USB3 SS UPHY lane), resolves the SS to USB2 companion
graph from the in-tree DTB, then renders a self-contained kernel-DT
overlay that flips every port action in three places in lockstep
(lane status, port status, host xHCI phys + phy-names).
UPHY lane allocation belongs to jetson-customize-uphy. No ODMDATA
edit. Output is one commit to the composite custom overlay .dts in
the bsp_sources/ hardware repo.
reference_devkit: + custom_carrier: blocks.<source.root_path>/Linux_for_Tegra/.git exists
(/jetson-init-source)./jetson-derive-carrier has run — carrier flash-conf fork in the
overlay tracker./jetson-customize-uphy has run when any enabled USB3 SS port
needs a non-stock UPHY lane allocation. Its JSON sidecar at
<workspace>/target-platform/<profile-stem>.jetson-customize-uphy.json
is consulted for SS lane allocation.custom_carrier: is present, both
documents.custom_carrier_schematic AND
documents.custom_carrier_pinmux_xls are REQUIRED. Refuse the run
if either is missing — per-port routing (VBUS-EN / OC / CC GPIOs, SS
lane wiring, hub fan-out) on a custom carrier cannot be guessed.
Reference-devkit-only profiles skip this check.dtc, fdtoverlay on PATH.USB on Tegra spans three IP surfaces: the xusb_padctl block (USB2
test cases passed, vs 8 / 19 without
More skills from the same source and nearby in the registry, with their headline benchmark lift.