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UVM Methodology Skill · a5c-ai | DecimalAI

testingby a5c-ai

UVM Methodology Skill

a5c-ai/uvm-methodology

Source a5c-ai/babysitter ↗License MIT

Deep expertise in Universal Verification Methodology (IEEE 1800.2) for FPGA verification

SkillScore86Maintained

Automatic

QA & Test Engineering pack

Last verified 8/29/2026

What it changes

Passed 19 of 22 test cases with the skill, and 16 of 22 without it.

Without skill73%

With skill86%

Checks it passed that the model alone missed

The class extends uvm_sequence_item.
The top environment class extends uvm_env.
Virtual interfaces are retrieved using uvm_config_db.

and 4 more in the full report

3 fixed16 passed either way3 still failing0 broke

Pass-rate lift: +14 pp
Tokens: +26%
Agent turns: 0%
Response time: +26%

Model gemini-3.6-flashMeasured 8/29/2026v119 of 22 cases passed with skill

Tokens, turns and time describe resource use, not a dollar price.

Use this skill

Save it into your project's skills folder. Claude Code picks it up in its next session.

curl -fsSL --create-dirs -o .claude/skills/a5c-ai-uvm-methodology/SKILL.md https://app.decimal.ai/s/a5c-ai-uvm-methodology/SKILL.md

Want it pinned and updatable? pip install "decimalai>=0.15", then decimalai skills add a5c-ai-uvm-methodology, and start Claude Code with claude --plugin-dir "$(git rev-parse --show-toplevel)/.agents"

1 · One-time — install the CLI (docs ↗)

pip install "decimalai>=0.15"

2 · Get the skill — writes .agents/skills/a5c-ai-uvm-methodology/ and pins it in .decimal/skills.lock

decimalai skills add a5c-ai-uvm-methodology

No CLI? Get the same file — curl · raw file

curl -fsSL --create-dirs -o .claude/skills/a5c-ai-uvm-methodology/SKILL.md https://app.decimal.ai/s/a5c-ai-uvm-methodology/SKILL.md

Raw file: /s/a5c-ai-uvm-methodology/SKILL.md ↗ · machine-readable summary at /s/a5c-ai-uvm-methodology.json ↗

Safety checks: 3 of 3 passed

Code scan CleanIntent PassedContent Clean

See it in action

One of 3 test cases the skill fixed. Same model, same prompt, with and without the skill.

1 of 3

Prompt

Please provide a SystemVerilog testbench environment structure for an AHB slave module, including the top environment class, a reference-checking scoreboard, and functional coverage tracking.

What was checked, without and with the skill
Checked	Without skill	With skill
The top environment class extends uvm_env.	Missed	Passed
Components are instantiated using the UVM factory create method.	Missed	Passed
Virtual interfaces are retrieved using uvm_config_db.	Missed	Passed

case-01 · gemini-3.6-flash · 8/29/2026 · answers are capped and redacted

What's inside

The instructions your model reads when the skill loads.

SKILL.md60 linessingle file

UVM Methodology Skill

Overview

Expert skill for Universal Verification Methodology (UVM) development following IEEE 1800.2 standards for comprehensive FPGA verification.

Capabilities

Generate UVM agent architecture (driver, monitor, sequencer)
Create UVM environments and scoreboards
Implement uvm_sequence and virtual sequences
Configure UVM factory and config_db
Implement functional coverage with covergroups
Design UVM register models (RAL)
Apply UVM phasing and objections correctly
Debug UVM testbenches effectively

Target Processes

uvm-testbench.js
constrained-random-verification.js
testbench-development.js

Usage Guidelines

Agent Architecture

Driver: Converts sequence items to pin-level activity
Monitor: Observes DUT interface and creates transactions
Sequencer: Routes sequence items to driver
Agent: Contains driver, monitor, sequencer; configurable active/passive

Environment Structure

Top-level environment contains agents and scoreboard
Scoreboard performs reference model comparison
Config objects distribute configuration
Virtual sequencer coordinates multiple agents

Sequence Development

Extend from uvm_sequence#(item_type)
Use start_item() / finish_item() paradigm

Track record

Benchmark

19 / 22

test cases passed, vs 16 / 22 without

Adoption

Users: 0
Times used: 0

Safety and source details

SkillSafety

✓ 3 of 3 passed

Code scan15 of 15 checks clean

0 critical · 0 warning · 0 info — scanner v4 — 8/10/2026

View 15 scanner checks

live_secretremote_code_executionreverse_shelldata_exfiltrationssrf_metadataagent_snoopinganti_refusaldestructive_commandsobfuscated_unicodeunicode_homoglyphopaque_blobsuspicious_urltool_overreachtrigger_abuseprompt_injection_phrasing

IntentSafe

LLM judge · does the skill do what it claims

ContentClean

LLM judge · policy & harmful-content review

Source

Imported

a5c-ai / babysitter

library/specializations/fpga-programming/skills/uvm-methodology/SKILL.md

View on GitHub ↗

License MITImported 8/10/2026Version v1

More skills from the same source and nearby in the registry, with their headline benchmark lift.

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See it in action

What's inside

UVM Methodology Skill

Overview

Capabilities

Target Processes

Usage Guidelines

Agent Architecture

Environment Structure

Sequence Development

Track record

Benchmark

Adoption

SkillSafety

Source

Related skills