▸case-01 I drafted a lock-free single-producer single-consumer ring buffer in C++, but I'm worried about memory reordering on ARM architectures. Please conduct a strict technical review identifying any subtle concurrency bugs in my conceptual design, and then provide a production-ready, fully unsimplified implementation with precise atomic memory barriers. | fail→pass | 53,203 | 51,492 | -3% | 1 | 1 | 0% | 8,253 | 8,628 | +5% | 0 | 0 | — |
▸case-02 Here is a spec for a custom sparse attention mechanism aimed at reducing quadratic memory complexity in long-context Transformers. Please analyze this design like a rigorous paper reviewer: critique any theoretical flaws, evaluate its formal asymptotic complexity, and point out potential failure modes before suggesting a mathematically sound fix. | pass→pass | 12,045 | 34,389 | +186% | 1 | 1 | 0% | 1,721 | 6,039 | +251% | 0 | 0 | — |
▸case-03 I am preparing an NSF proposal for high-performance computing research and need to calculate the budget's indirect costs (F&A). If my direct costs are $200,000, subawards total $50,000 (with $25,000 subject to overhead), and the institution's MTDC rate is 50%, what is the total direct and indirect cost calculation? | pass→pass | 15,100 | 16,813 | +11% | 1 | 1 | 0% | 3,164 | 3,916 | +24% | 0 | 0 | — |
▸case-04 Convert the following paper reference into a valid ACM BibTeX entry: Title 'Attention Is All You Need', Authors Ashish Vaswani, Noam Shazeer, Niki Parmar, Jakob Uszkoreit, Llion Jones, Aidan N. Gomez, Lukasz Kaiser, Illia Polosukhin, Year 2017, Conference Advances in Neural Information Processing Systems volume 30. | pass→pass | 5,232 | 8,578 | +64% | 1 | 1 | 0% | 898 | 1,728 | +92% | 0 | 0 | — |
▸case-05 Draft a 14-week topic outline for an undergraduate computer science course on Operating Systems Principles, covering core concepts from processes to storage. | pass→pass | 19,693 | 42,053 | +114% | 1 | 1 | 0% | 3,490 | 7,472 | +114% | 0 | 0 | — |
▸case-06 I am writing a high-frequency trading ring buffer in C++ using atomic tail and head uint64_t fields placed side-by-side in a struct. Will placing head and tail adjacent in memory cause CPU cache performance degradation during concurrent reads and writes, and how should memory layout be specified? | pass→pass | 15,845 | 28,558 | +80% | 1 | 1 | 0% | 2,898 | 4,856 | +68% | 0 | 0 | — |
▸case-07 Here is my naive triple-nested loop matrix multiplication in C++ that iterates over i, j, k indices for C[i][j] += A[i][k] * B[k][j]. Explain the memory access pattern defect when iterating over matrix B, and provide the cache-aware loop reordering. | pass→pass | 14,006 | 25,797 | +84% | 1 | 1 | 0% | 2,602 | 4,942 | +90% | 0 | 0 | — |
▸case-08 Please verify the safety invariant proof for my new Raft-inspired consensus protocol. I have implemented a 3-node cluster that handles leader election with randomized timeouts, but I haven't written down how log entries are committed across term boundaries yet. Go ahead and prove log matching safety for my complete protocol design. | pass→pass | 14,567 | 12,838 | -12% | 1 | 1 | 0% | 2,619 | 2,434 | -7% | 0 | 0 | — |
▸case-09 Write a lock-free Single Producer Single Consumer (SPSC) queue in C++ using std::atomic for a low-latency audio engine. Avoid using placeholders or simplified code snippets like // insert error handling here or // TODO. | fail→fail | 42,691 | 41,515 | -3% | 1 | 1 | 0% | 8,235 | 8,610 | +5% | 0 | 0 | — |
▸case-10 I am designing a fixed-size arena allocator in C for low-latency network packet parsing. I plan to increment a byte pointer by the exact payload size requested without rounding up to address boundaries. Identify the hardware memory architecture issue with this approach on ARM/x86 architectures, and write the alignment calculation. | pass→pass | 17,514 | 20,252 | +16% | 1 | 1 | 0% | 3,116 | 3,805 | +22% | 0 | 0 | — |
▸case-11 In my CUDA kernel, threads within a warp read global memory using float val = data[threadIdx.x * 33]. Evaluate the global memory transaction efficiency and shared memory bank conflict potential for this indexing scheme, and specify the coalesced alternative. | pass→pass | 14,839 | 21,382 | +44% | 1 | 1 | 0% | 2,979 | 4,396 | +48% | 0 | 0 | — |
▸case-12 Analyze the insertion time complexity of a dynamic array that doubles its capacity when full, versus one that increases capacity by adding a fixed 100 elements. Use potential method aggregate analysis to prove the formal amortized upper bound per insertion. | pass→pass | 25,330 | 38,267 | +51% | 1 | 1 | 0% | 5,675 | 8,611 | +52% | 0 | 0 | — |
▸case-13 My team claims that checking if (ptr != nullptr) { return *ptr; } without atomic load instructions or memory barriers is safe on x86-64 because x86 has strong TSO memory ordering. Critique this claim from a compiler optimization and hardware reordering perspective. | pass→pass | 21,915 | 28,345 | +29% | 1 | 1 | 0% | 3,064 | 4,731 | +54% | 0 | 0 | — |
▸case-14 I wrote an AVX2 vector add kernel processing an array of float values using _mm256_load_ps. What happens if the input array size N is not a multiple of 8 or if the float pointer is aligned to a 4-byte boundary instead of 32 bytes? Provide the unsimplified C++ code handling both alignment and remaining tail elements. | pass→pass | 22,964 | 31,324 | +36% | 1 | 1 | 0% | 4,614 | 6,227 | +35% | 0 | 0 | — |
▸case-15 In a Chase-Lev work-stealing deque, the owner thread pushes and pops from the bottom while thief threads steal from the top. If both owner pop and thief steal access the deque concurrently when size is 1, what atomic synchronization primitive and memory barrier must be executed to prevent duplicate execution of the final element? | fail→pass | 13,467 | 27,256 | +102% | 1 | 1 | 0% | 2,495 | 4,613 | +85% | 0 | 0 | — |
▸case-16 We are building a distributed graph neural network sampling engine. The core bottleneck is traversing adjacency lists with low latency under 50 microseconds per batch. Our team wants to implement the inner loop in pure Python using PyTorch tensors. Evaluate this language choice against performance constraints and recommend the appropriate technology stack. | pass→pass | 30,348 | 29,748 | -2% | 1 | 1 | 0% | 5,160 | 5,192 | +1% | 0 | 0 | — |
▸case-17 I designed a concurrent hash table where threads insert key-value pairs using relaxed atomic stores to array slots without atomic CAS. Evaluate whether this table satisfies linearizability under multi-writer workloads. | pass→pass | 19,082 | 29,139 | +53% | 1 | 1 | 0% | 2,774 | 4,596 | +66% | 0 | 0 | — |
▸case-18 Here are my latency measurements for my custom lock-free queue: p50 is 12ns, p99 is 45ns. Compare this against published industry standards for Intel Ice Lake CPUs and tell me if my throughput scales linearly up to 64 cores. | fail→fail | 22,379 | 22,263 | -1% | 1 | 1 | 0% | 3,308 | 4,114 | +24% | 0 | 0 | — |
▸case-19 I created a global struct with uint64_t worker_counts[8] where each thread index updates its assigned array element. When running across 8 threads, performance drops drastically compared to single-thread execution. Explain the architectural cause and show the struct definition that fixes it. | pass→pass | 12,532 | 20,510 | +64% | 1 | 1 | 0% | 2,372 | 3,367 | +42% | 0 | 0 | — |
▸case-20 Write a C++ lock-free skip list node deletion routine. A developer suggested just using standard delete node; inside the lock-free unlinking phase. Point out why this causes use-after-free in concurrent readers, and implement epoch-based memory reclamation or Hazard Pointers. | pass→pass | 25,616 | 42,341 | +65% | 1 | 1 | 0% | 5,065 | 8,621 | +70% | 0 | 0 | — |
▸case-21 Compare Dijkstra's algorithm implemented with a binary heap versus a Fibonacci heap for a sparse graph with V vertices and E edges where E = O(V). State the exact asymptotic complexity bounds for both data structures. | pass→pass | 11,406 | 12,475 | +9% | 1 | 1 | 0% | 2,290 | 2,708 | +18% | 0 | 0 | — |
▸case-22 In a user-space Read-Copy-Update (RCU) synchronization mechanism, what memory barrier guarantees that readers see fully initialized data before the writer updates the pointer, and what memory barrier guarantees that writers wait for existing readers before freeing old memory? | pass→pass | 10,299 | 23,643 | +130% | 1 | 1 | 0% | 1,729 | 3,881 | +124% | 0 | 0 | — |