HSB FPGA Flash

HSB FPGA Flash

Use this skill when the user wants to flash (upgrade or downgrade) the FPGA firmware on an HSB board connected to a supported NVIDIA devkit.

This skill supports two board types:

1. HSB Lattice boards — standalone FPGA board with a Lattice CPNX100 FPGA
2. Leopard Imaging VB1940 — "all-in-one" camera with an integrated Lattice FPGA

CRITICAL SAFETY RULE: Never mix board-type commands. Using program_leopard_cpnx100 on a Lattice board or program_lattice_cpnx100 on a VB1940 can permanently brick the device. The skill must detect and confirm the board type before any flash operation, and refuse to proceed if the board type is ambiguous or mismatched.

This workflow has side effects (it permanently modifies FPGA firmware). Never run it automatically. Only run it when the user explicitly invokes it.

Usage warning: This skill flashes the FPGA with new firmware. Before invoking it, ask the user to make sure they have enough Claude Code usage/tokens to complete the workflow.

Before you start — required gates (do these first, in order)

Gate 1 — Read environment variables. Before doing anything else, check these variables and print their resolved values to the user:

SSH_TARGET      Remote devkit login (e.g. [email protected]). Ask the user if not set.
REMOTE_ROOT     Remote working directory (e.g. /home/nvidia). Ask the user if not set.
REMOTE_SUDO     sudo / sudo -n / "" — default to "sudo" if not set.
REMOTE_SSH_OPTS Additional SSH options (optional).
HSB_PLATFORM    Platform hint (optional).

SSH_TARGET and REMOTE_ROOT are required. Stop and ask the user for them if either is missing.

Gate 2 — Present the flash summary and phase plan. Before taking any action:

If the user's request already includes board type, current FPGA version, and target FPGA version, state the following before the phase plan: flash tool (program_lattice_cpnx100 for Lattice, program_leopard_cpnx100 for VB1940 — never mix), manifest release and filename, CLI flags (--force --accept-eula), whether the procedure is single-step or two-step via gateway 2412. For VB1940, also state that no v2.0.0 interim repo is needed. For two-step upgrades from FPGA 2407, state that step 1 uses hololink --force fpga_version (not hololink enumerate, which is incompatible with FPGA 2407) and uses v2.0.0 flag placement: hololink --force program scripts/manifest.yaml --accept-eula (--force before the subcommand).

Then show the phase plan and ask explicitly: Shall I proceed with the flash workflow? [Y/n] — do not start Gate 3 until the user confirms:

HSB Flash — Phase Plan
  Phase 0: Token-budget preflight
  Phase 1: Verify board connectivity, detect board type (Lattice or VB1940), read FPGA version
  Phase 2: Select target FPGA version